[原创]iFPGA-USB2.0 FT2232H USB & UART开发板使用说明

iFPGA-USB2.0 FT2232H USB & UART 开发板使用说明

基本特性：

• 沉金工艺；
• 速度达到30MB/S以上；
• FT2232H USB2.0免固件开发；
• FPGA-USB2.0源码，即拿即用，简化用户设计；
• 框架开发、方便用户扩展；
• 128K Byte SRAM；
• 有源晶振50MHz；
• 40组 User IO扩展；
• 16Mbit Flash；

框图：

实物图：

管脚约束：

 NET "FPGA-IO14" LOC = "P82";

 NET "FPGA-IO15" LOC = "P81";

 NET "FPGA-IO16" LOC = "P80";

 NET "FPGA-IO17" LOC = "P79";

 NET "FPGA-IO18" LOC = "P78";

 NET "FPGA-IO19" LOC = "P75";

 NET "SRAM-WE" LOC = "P104";

 NET "SRAM-CE" LOC = "P105";

 NET "SRAM-OE" LOC = "P102";

 NET "FPGA-IO1" LOC = "P101";

 NET "FPGA-IO2" LOC = "P100";

 NET "FPGA-IO3" LOC = "P99";

 NET "FPGA-IO4" LOC = "P98";

 NET "FPGA-IO5" LOC = "P97";

 NET "FPGA-IO6" LOC = "P95";

 NET "SYS-CLK" LOC = "P84";

 NET "FPGA-IO7" LOC = "P94";

 NET "FPGA-IO8" LOC = "P93";

 NET "FPGA-IO9" LOC = "P92";

 NET "FPGA-IO10" LOC = "P88";

 NET "FPGA-IO11" LOC = "P87";

 NET "FPGA-IO12" LOC = "P85";

 NET "FPGA-IO13" LOC = "P83";

 NET "FPGA_DOUT" LOC = "P74";

 NET "FPGA_SUSPEND" LOC = "P73";

 NET "JTAG_TDO" LOC = "P106";

 NET "JTAG_TMS" LOC = "P107";

 NET "JTAG_TCK" LOC = "P109";

 NET "JTAG_TDI" LOC = "P110";

 NET "FPGA_CMPCS_B" LOC = "P72";

 NET "FPGA_DONE" LOC = "P71";

 NET "SPI_CLK" LOC = "P70";

 NET "FPGA_M0" LOC = "P69";

 NET "FPGA-IO20" LOC = "P67";

 NET "FPGA-LED1" LOC = "P58";

 NET "SPI_MISO" LOC = "P65";

 NET "SPI_MOSI" LOC = "P64";

 NET "FPGA-LED0" LOC = "P57";

 NET "FPGA-LED3" LOC = "P61";

 NET "FPGA_M1" LOC = "P60";

 NET "FPGA-LED4" LOC = "P62";

 NET "FPGA-LED5" LOC = "P66";

 NET "FPGA-LED2" LOC = "P59";

 NET "FPGA-IO21" LOC = "P56";

 NET "FPGA-IO22" LOC = "P55";

 NET "FPGA-IO23" LOC = "P51";

 NET "FPGA-IO24" LOC = "P50";

 NET "FPGA-IO25" LOC = "P48";

 NET "FPGA-IO26" LOC = "P47";

 NET "FPGA-IO27" LOC = "P46";

 NET "FPGA-IO28" LOC = "P45";

 NET "FPGA-IO29" LOC = "P44";

 NET "FPGA-IO30" LOC = "P43";

 NET "FPGA-IO31" LOC = "P41";

 NET "FPGA-IO32" LOC = "P40";

 NET "FPGA_INIT_B" LOC = "P39";

 NET "SPI_CS" LOC = "P38";

 NET "FPGA_PROGRAM_B" LOC = "P37";

 NET "SRAM-A0" LOC = "P111";

 NET "SRAM-A1" LOC = "P112";

 NET "SRAM-A2" LOC = "P114";

 NET "SRAM-A3" LOC = "P115";

 NET "SRAM-A4" LOC = "P124";

 NET "SRAM-A5" LOC = "P126";

 NET "SRAM-A6" LOC = "P127";

 NET "SRAM-A7" LOC = "P131";

 NET "SRAM-A8" LOC = "P143";

 NET "SRAM-A9" LOC = "P142";

 NET "SRAM-A10" LOC = "P141";

 NET "SRAM-A11" LOC = "P140";

 NET "SRAM-A12" LOC = "P139";

 NET "SRAM-A13" LOC = "P132";

 NET "SRAM-A14" LOC = "P120";

 NET "SRAM-A15" LOC = "P119";

 NET "SRAM-A16" LOC = "P118";

 NET "SRAM-IO0" LOC = "P116";

 NET "SRAM-IO1" LOC = "P117";

 NET "SRAM-IO2" LOC = "P121";

 NET "SRAM-IO3" LOC = "P123";

 NET "SRAM-IO4" LOC = "P138";

 NET "SRAM-IO5" LOC = "P137";

 NET "SRAM-IO6" LOC = "P134";

 NET "SRAM-IO7" LOC = "P133";

 NET "FT2232HL-D0" LOC = "P1";

 NET "FT2232HL-D1" LOC = "P2";

 NET "FT2232HL-D2" LOC = "P5";

 NET "FT2232HL-D3" LOC = "P6";

 NET "FT2232HL-D4" LOC = "P7";

 NET "FT2232HL-D5" LOC = "P8";

 NET "FT2232HL-D6" LOC = "P9";

 NET "FT2232HL-D7" LOC = "P10";

 NET "FT2232HL-RXF" LOC = "P11";

 NET "FT2232HL-TXE" LOC = "P12";

 NET "FT2232HL-RD" LOC = "P14";

 NET "FT2232HL-WR" LOC = "P15";

 NET "FT2232HL-SIWUA" LOC = "P16";

 NET "FPGA_TXD" LOC = "P24";

 NET "FT2232HL-CLKOUT" LOC = "P17";

 NET "FT2232HL-OE" LOC = "P22";

 NET "FT2232HL-H7" LOC = "P21";

 NET "FPGA-IO33" LOC = "P35";

 NET "FPGA-IO34" LOC = "P34";

 NET "FPGA-IO35" LOC = "P33";

 NET "FPGA-IO36" LOC = "P32";

 NET "FPGA-IO37" LOC = "P30";

 NET "FPGA-IO38" LOC = "P29";

 NET "FPGA-IO39" LOC = "P27";

 NET "FPGA-IO40" LOC = "P26";

 NET "FPGA_RXD" LOC = "P23";

FT2232H配置

 <?xml version="1.0" encoding="utf-16"?>

 <FT_EEPROM>

   <Chip_Details>

     <Type>FT2232H</Type>

   </Chip_Details>

   <USB_Device_Descriptor>

     <VID_PID>0</VID_PID>

     <idVendor>0403</idVendor>

     <idProduct>6010</idProduct>

     <bcdUSB>USB 2.0</bcdUSB>

   </USB_Device_Descriptor>

   <USB_Config_Descriptor>

     <bmAttributes>

       <RemoteWakeupEnabled>false</RemoteWakeupEnabled>

       <SelfPowered>false</SelfPowered>

       <BusPowered>true</BusPowered>

     </bmAttributes>

     <IOpullDown>false</IOpullDown>

     <MaxPower>500</MaxPower>

   </USB_Config_Descriptor>

   <USB_String_Descriptors>

     <Manufacturer>iFPGA Labs</Manufacturer>

     <Product_Description>iFPGA USB 2.0</Product_Description>

     <SerialNumber_Enabled>true</SerialNumber_Enabled>

     <SerialNumber />

     <SerialNumberPrefix>21</SerialNumberPrefix>

     <SerialNumber_AutoGenerate>true</SerialNumber_AutoGenerate>

   </USB_String_Descriptors>

   <Hardware_Specific>

     <Suspend_DBUS7>false</Suspend_DBUS7>

     <TPRDRV>0</TPRDRV>

     <Port_A>

       <Hardware>

         <UART>false</UART>

         <_245FIFO>true</_245FIFO>

         <CPUFIFO>false</CPUFIFO>

         <OPTO>false</OPTO>

       </Hardware>

       <Driver>

         <VCP>false</VCP>

         <D2XX>true</D2XX>

       </Driver>

     </Port_A>

     <Port_B>

       <Hardware>

         <UART>true</UART>

         <_245FIFO>false</_245FIFO>

         <CPUFIFO>false</CPUFIFO>

         <OPTO>false</OPTO>

       </Hardware>

       <Driver>

         <VCP>true</VCP>

         <D2XX>false</D2XX>

       </Driver>

     </Port_B>

     <IO_Pins>

       <Group_AL>

         <SlowSlew>false</SlowSlew>

         <Schmitt>false</Schmitt>

         <Drive>4mA</Drive>

       </Group_AL>

       <Group_AH>

         <SlowSlew>false</SlowSlew>

         <Schmitt>false</Schmitt>

         <Drive>4mA</Drive>

       </Group_AH>

       <Group_BL>

         <SlowSlew>false</SlowSlew>

         <Schmitt>false</Schmitt>

         <Drive>4mA</Drive>

       </Group_BL>

       <Group_BH>

         <SlowSlew>false</SlowSlew>

         <Schmitt>false</Schmitt>

         <Drive>4mA</Drive>

       </Group_BH>

     </IO_Pins>

   </Hardware_Specific>

 </FT_EEPROM>

基于FTDI USB2.0测试情况如下

FPGA工程

生成的版本烧写到flash里面

上位机测试界面如下：