问题描述
与x86兼容的加速器MIC Intel Xeon Phi中是否有SIMD(SSE/AVX)指令?
http://en.wikipedia.org/wiki/Xeon_Phi
是的，当前一代的Intel Xeon Phi协处理器(代号"Knight's Corner" ，缩写为KNC)支持512位SIMD.指令集，称为Intel®Initial Many Core指令"(缩写为Intel® IMCI ).
英特尔IMCI 与不兼容，并且不等同于SSE，AVX，AVX2或AVX-512 ISA.但是，它已正式宣布，下一代Xeon Phi(代号"Knight's Landing" ，缩写为 KNL )计划中的下一代将支持AVX-512 ISA .
Intel IMCI(受KNC支持)和AVX-512(受KNL支持)都是512位SIMD指令集，支持FMA，并允许打包8个双精度或16个单精度浮点数，或16个32位整数(即比AVX或AVX2两倍多").
KNC 无法运行" SSE或AVX二进制文件时，通常没有关系，因为要生成可以在KNC上运行的应用程序二进制文件，您需要重新编译您可以使用Intel C/C ++/Fortran编译器来编写您的代码，众所周知，它可以自动或半自动生成相对有效的矢量代码(用于SSE，AVX，IMCI等)，还可以让您在需要时使用IMCI内部函数. >
侧面说明:对于Knights Landing(支持AVX-512)，Intel工具链将不再是唯一的选择，但它可能会继续提供许多优势，包括可靠的显式和自动矢量化以及良好的水平.与Intel分析工具集成(例如， AVX-512分析 href ="https://software.intel.com/zh-cn/intel-advisor-xe" rel ="nofollow noreferrer">英特尔(矢量化)顾问).
AVX-512 ISA 与SSE，AVX和AVX2兼容.因此，在Xeon上为AVX编译的应用程序将在 KNL 上运行，而在Xeon Phi KNL 上的AVX-512编译的应用程序通常将在未来代上运行至强(将来支持AVX-512).
使用以下在线指南，可以轻松了解AVX，IMCI和将来的AVX-512指令集之间的区别: http://software.intel.com/sites/landingpage/IntrinsicsGuide/
Are there SIMD(SSE / AVX) instructions in the x86-compatible accelerators MIC Intel Xeon Phi?
http://en.wikipedia.org/wiki/Xeon_Phi
Yes, current generation of Intel Xeon Phi co-processors (codename "Knight's Corner", abbreviated KNC) supports 512-bit SIMD instruction set called "Intel® Initial Many Core Instructions" (abbreviated Intel® IMCI).
Intel IMCI is not "compatible with" and is not equialent to SSE, AVX, AVX2 or AVX-512 ISA.However it's officially announced that next planned generations of Xeon Phi (codename "Knight's Landing", abbreviated KNL) will support AVX-512 ISA.
Both Intel IMCI (supported by KNC) and AVX-512 (to be supported by KNL) are 512-bit SIMD instruction sets, supporting FMA and allowing to pack 8 double precision or 16 single precision floating-point numbers, or 16 32-bit integers (i.e. two times "more" than AVX or AVX2).
While KNC is unable to "run" SSE or AVX binaries, it often doesn't matter, because in order to generate your application binary to be able to run on KNC - you need to recompile your code using Intel C/C++/Fortran Compiler, which is known to automatically or semi-automatically generate relatively efficient vector codes (for SSE, AVX, IMCI, etc) and also gives you capability to use IMCI intrinsics if needed.
Side note: for Knights Landing (with AVX-512 support) Intel toolchain will not be a sole option anymore, but it will likely continue to provide many advantages, including solid explicit- and auto- vectorier as well as good level of integration with Intel profiling tools (note for example AVX-512 analysis in Intel (Vectorization) Advisor) .
AVX-512 ISA is compatible with SSE, AVX and AVX2. Therefore applications compiled for AVX on Xeon will run on KNL, while applications compiled for AVX-512 on Xeon Phi KNL will normally run on future generations of Xeon (to support AVX-512 in future).
The difference between AVX, IMCI and future AVX-512 instruction sets could easily be explored using following online guide: http://software.intel.com/sites/landingpage/IntrinsicsGuide/
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