问题描述
我正在尝试将一些ARM NEON代码移植到AltiVec.我们的NEON代码具有两个LOAD,一个ROT,一个XOR和一个STORE,因此这似乎是一个简单的测试用例.根据IBM的 vec_rl
文档:
I'm trying to port some ARM NEON code to AltiVec. Our NEON code has two LOAD's, one ROT, one XOR and a STORE so it seems like a simple test case. According to IBM's vec_rl
documentation:
文档接着说vector unsigned int
是最大的数据类型,除非-qarch=power8
,在这种情况下vector unsigned long long
适用.
The docs go on to say vector unsigned int
is the largest data type unless -qarch=power8
, in which case vector unsigned long long
applies.
我想对单个元素执行128位旋转,而不是32位或64位旋转.位的位置是19、31、67、97和109.它们不是字节对齐的. (常量来自 ARIA分组密码.)
I'd like to perform a 128-bit rotate, and not 32-bit or 64-bit rotation of individual elements. The bit positions are 19, 31, 67, 97, and 109. They are not byte aligned. (The constants arise from the ARIA block cipher).
最大的AltiVec数据安排是4x32和2x64吗?是否可以在Altivec中旋转128位值?
Are 4x32 and 2x64 the largest AltiVec data arrangements? Is it possible to rotate a 128-bit value in Altivec?
如果只有填充旋转是可用的操作,那么在C或AltiVec中进行位旋转是最好的做法吗?
If the packed rotate is the only operation available, then is it a best practice to do the bit twiddling in C or in AltiVec?
推荐答案
您可以使用vsld
(vec_sld
)进行8位的倍数旋转,然后处理<的所有剩余旋转.您可能需要使用8位来使用vsl
+ vsr
+ vsel
(vec_sll
+ vec_srl
+ vec_sel
).
You can do a rotate by a multiple of 8 bits using vsld
(vec_sld
), then to handle any remaining rotation of < 8 bits you'll probably need to use vsl
+ vsr
+ vsel
(vec_sll
+ vec_srl
+ vec_sel
).
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