交叉的问题，从源头为ARM编译的Qt 4.7

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问题描述

我试图交叉编译的Qt 4.7.1从源代码，这里有我的设置一些注意事项：

我的预期成果是所需要的是为了运行一个Qt应用程序present共享对象库。

我的目标平台是TI AM335x处理器，它是ARM的Cortex-A8架构的。

我的开发平台是x86的64位的Ubuntu虚拟机

我如何这应该工作的理解是，我下载工具链为我的目标平台（这是的），我下载的源$ C $ c代表的，我设置了mkspec用我的工具链，运行配置，然后只需运行制作 / 使安装，我应该能够找到所有的的.so 的我在哪里告诉它安装到。我有很多问题得到这个想法但是工作。

首先，我下载的TI SDK版本：TI-SDK-am335x-EVM-06.00.00.00有手臂工具的位置：
[root_install_dir] / linux下的devkit / sysroots / i686的-阿拉戈Linux的的/ usr / bin中

我更新了我的 $ PATH 与目录：

I then created my own mkspec based on the closest example:cp -R [qt_install_dir]/mkspecs/qws/linux-arm-gnueabi-g++/ [qt_install_dir]/mkspecs/qws/linux-am335x-g++

and I modified the linux-am335x-g++/qmake.conf to point to the tools from the TI sdk:

# modifications to g++.conf
QMAKE_CC                = arm-linux-gnueabihf-gcc
QMAKE_CXX               = arm-linux-gnueabihf-g++
QMAKE_LINK              = arm-linux-gnueabihf-g++
QMAKE_LINK_SHLIB        = arm-linux-gnueabihf-g++

# modifications to linux.conf
QMAKE_AR                = arm-linux-gnueabihf-ar cqs
QMAKE_OBJCOPY           = arm-linux-gnueabihf-objcopy
QMAKE_STRIP             = arm-linux-gnueabihf-strip

Then I ran a configure command:

It runs for a while then completes and says it's ready to do make/make install at this point I run make and that's where it starts to fail:

So, the question...Why is the compiler complaining that the thumb mode is not supported? Since this is a cross compile tool chain for an ARM based processor, it should be supported. The fact that it's not makes me feel that make is somehow picking up the wrong version of g++.

Any thoughts on what went wrong and how to fix this?

解决方案

Note, the compiler is complaining about the swp instruction not being available for thumb mode. Your CPU supports thumb, thumb2, and ARM. The Cortex series deprecates the use of swp and prefers ldrex/strex pairs.

You need to get gcc to define __ARM_ARCH_7__; this is done with either -mcpu=cortex-a8 or the combination -mtune=cortex-a8 and -march=armv7-a or what ever you like depending on how many types of boards you want Qt to run on.

In detail, see qatomic_arm.h for where a sub-file is selected. You have a very generic ARM selected (I guess), so you get qatomic_armv5.h where you can see the code around line 125. The right file for your CPU is qatomic_armv7.h, which mainly just includes qatomic_armv6.h. In this file you can find ldrex/strex which is the wholesome goodness that your gcc is requesting.

I also suggest you do not compile with -fast. There is another question where the OP says this solved his issue; but I think this is different.

You can try to pass -armfpa to configure. ./configure -embedded arm --help is useful. configure appears to have selected NEON, so it seems to know you have a more advanced CPU (there is no NEON on an armv5, but this maybe a fault of configure).

For certain, you don't want the swp code and the ldrex/strex is preferred for your system, even if swp could somehow work. I would at least resolve this. Alter the -xplatform qws/linux-am335x-g++ to update -mcpu or possibly pass an explicit -D__ARM_ARCH_7__. You can get a list of defines with arm-gcc -mcpu=cortex-a8 -dM -E - < /dev/null, to verify that the __ARM_ARCH_7__ is being defined. It looks like it is moc failing, so maybe the -D__ARM_ARCH_7_ solution will be needed.

You might also try to alter -mthumb in the compiler option. It is probably best to use -mcpu=cortex-a8 and -mthumb for your system, if you can get that to compile/build. Omitting -mthumb will make the code slightly larger. You might also try -Os. For some reason, I have huge builds with other optimizations and more recent gcc versions. It appears to be due to some C++ feature as normal 'C' doesn't behave this way; but this may just be my compiler. I looked and believe it is the exception tables, but I never confirmed anything and moved on. I am sure you are aware of how long Qt takes to compile.

Note1: The qatomic_armv5.h code is fairly confused and newer gcc or binutils will choke even when this is the correct file to use.

 asm volatile("swpb %0,%2,[%3]"
: "=&r"(ret), "=m" (*ptr)
: "r"(newval), "r"(ptr)
: "cc", "memory");

This specifies some inline assembler parameters which are never used. Not to mention the condition codes are not used, etc.

asm volatile("swpb %0,%1,[%2]"
             : "=r"(ret)
             : "0"(newval), "r"(ptr)
             : "memory");

will compile with newer gcc and binutils. It also uses less registers and is optimal for the way Qt is currently using it; there maybe cases where ret needs to be preserved to compare to newval but it is just a user space spin lock currently.

The bracket [x] is a memory operand register and must be different than the other two parameters for a valid swp. I believe the first form was used to stop %0 from being the same as %3. The 2nd form avoids this by making %0 and %1 the same, so %2 must be different.

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