问题描述
以下是DTS文件的摘录.linux/arch/powerpc/boot/dts/[board_name] .dts
memory {
device_type = "memory";
reg = <0x00000000 0x40000000>; // 1GB at 0
};
嵌入式设备具有1 GB的内存.
0x40000000 = 1073741824(十进制).
我获得1 GB的唯一方法是当我将1073741824计算为字节时.
这意味着1073741824字节= 1GB.
那么这是否意味着0x00000000指向RAM中的数据字节?换句话说，RAM中的每个字节都有一个地址.
为什么会这样?我们读什么是8位的块?为什么不说一个字?
TL; DR :RAM访问不是按字节大小的块，即使每个字节都可以在其中独立寻址(具有自己的地址) RAM.
首先成功实现数字革命"的微处理器是 8bit ，因此基本数据块的8bit遗产一直延续到今天.在具有8位CPU的第一代微处理器中，RAM中的每个字节都是单独读取/写入的.
下一代开发了带有大于8位的内部CPU寄存器.它们通常是8bits(16/32/64)的倍数，因为这使它们能够一次从RAM读取多个完整字节.从RAM读取地址X的任何尝试都将导致获取2/4/8bytes(在16/32/64位CPU上)，即RAM中的 word 包含地址X，并且仅保留了适当的字节并根据需要存储到内部CPU寄存器中.
接下来，随着CPU缓存的出现，RAM开始以 cacheline 大小的块进行读取(写入).这些甚至大于寄存器的大小.由于数据的局部性，这将减少从RAM读取数据的延迟.
有关详细信息，请查看Ulrich Drepper撰写的有关有关CPU和内存的文章. /p>
The following is an excerpt from DTS file.linux/arch/powerpc/boot/dts/[board_name].dts
memory {
device_type = "memory";
reg = <0x00000000 0x40000000>; // 1GB at 0
};
The embedded device has 1 GB of memory.
0x40000000=1073741824 in decimal.
The only way i get 1 GB is when i calculate 1073741824 as bytes.
Which means 1073741824 bytes = 1GB.
So does this mean 0x00000000 points to a byte of data in RAM?In other words, every byte in RAM has an address.
Why is that so? What do we read a block of 8 bits? Why not a word?
TL;DR : RAM accesses are NOT in byte sized chunks even though each byte is independently addressable(has its own address) in RAM.
The first really successful microprocessors, that took the "digital revolution" mainstream, were 8bit and hence the legacy of the basic chunk of data being 8bit continues till this day. In the first generation of microprocessors with 8bit CPUs, each byte from RAM was read/written to individually.
The next generation was developed with internal CPU registers that were larger than 8bits. They were usually multiples of 8bits(16/32/64) as this allowed them to read multiple complete bytes at once from RAM. Any attempt to read address X from RAM would result in fetching 2/4/8bytes(on 16/32/64bit CPUs) i.e. the word in RAM that contained the address X and only the appropriate byte was retained and stored into the internal CPU registers as required.
Next, with the advent of CPU-caches, RAM started being read from (and written to) in blocks of cacheline size. These are even larger than the size of the register. This would reduce the latency in reading data from RAM due to data locality.
For details, checkout this comprehensive article on CPU and memory by Ulrich Drepper.
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