在Emacs中定义多字符括号

问题描述

在Verilog中，您可以在开始和结束之间加上代码块，如下所示：

In Verilog you enclose code blocks between the words 'begin' and 'end' like this:

if(foo) begin
   x <= 1'b0;
   y <= 1'b0;
end else begin
   x <= x_d;
   y <= y_d;
end

有没有办法将开始和结束作为括号在Emacs中设置，以便您可以使用支票支票或类似信息来查找不匹配的信息？

Is there any way to set begin and end as parentheses in Emacs, so that you can use check-parens or similar to find any that are mismatched?

我已经尝试将这个（和各种各样的）添加到我的〜/ .emacs文件，但是它不喜欢它...

I've tried adding this (and variations of) to my ~/.emacs file, but it doesn't like it...

(modify-syntax-entry ?begin "(end" )
(modify-syntax-entry ?end ")begin" )

谢谢。

推荐答案

令人遗憾的是，Emacs的括号匹配基础设施并不了解多字符令牌。在Emacs-23.4中添加的新图书馆SMIE部分旨在解决这个问题。它允许主要模式描述语言的语法（在非常有限的语法中），之后像C-M-f和C-M-b这样的事物将知道如何跳过逻辑元素，例如。从开始跳到其匹配的结束。正如LindyDancer所说，这样的东西通常需要缩进，事实上SMIE的主要动机是提供一个通用的缩进引擎。

Sadly, Emacs's parenthesis matching infrastructure doesn't understand much of multi-character tokens. The new library SMIE added in Emacs-23.4 is partly intended to address this issue. It lets major modes describe the syntax of the language (in a very limited kind of grammar) after which things like C-M-f and C-M-b will know how to jump over logical elements, e.g. skip from a begin to its matching end. As LindyDancer notes, such things are usually needed for indentation, and indeed the main motivation behind SMIE was to provide a generic indentation engine.

现在Verilog不使用SMIE它实现了类似的导航命令。所以你可以尝试像

Now Verilog doesn't use SMIE but it does implement similar navigation commands. So you could probably try something like

(defun sm-verilog-check-parens ()
  (save-excursion
    (goto-char (point-min))
    (while (not (eobp))
      (verilog-forward-sexp))))

Tho我不知道如果 verilog-forward-sexp 会给你适当的警告/错误如果在意外的时刻碰到缓冲区的结尾。

Tho I do not know if verilog-forward-sexp will give you appropriate warnings/errors if it bumps into the end of buffer at an unexpected moment.

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