参数的覆盖大小是SystemVerilog的一个结构数组

参数的覆盖大小是SystemVerilog的一个结构数组

本文介绍了参数的覆盖大小是SystemVerilog的一个结构数组的处理方法,对大家解决问题具有一定的参考价值,需要的朋友们下面随着小编来一起学习吧!

问题描述

我有一个模块参数,该参数是predefined结构的数组。我把这个数组的默认大小为1元。我们的想法是与实例的时间适当的大小来覆盖它。

我在下面表明不会覆盖大小的方法。它仅会取代第一个值。我可以看到它为什么会做这样的大小字段不是参数。有没有更好的办法,而不是传递参数的大小?

感谢您的帮助。

 模块reg_slave
      #(参数
         reg_pkg :: defval_pair [0:0] REG_DEFVAL =0 //参数DECL与大小= 1
       )();
     endmodule:reg_slave    模块顶部();
      localparam reg_pkg :: defval_pair [1:0] REG_DEFVAL ='{
         {3,H32},
         {0,H1}
         }; //相同类型和尺寸= 2的参数      reg_slave#(
                   .REG_DEFVAL(REG_DEFVAL)//试图覆盖的大小。
                 )
      reg_slave_inst();    endmodule:顶部    包reg_pkg;
      typedef结构{打包INT ADDR;位[31:0] VAL;} defval_pair;
    endpackage:reg_pkg


解决方案

使用类型参数。但是,你仍然需要一个额外的参数传递到实例。它的优点是,你可以改变一个参数的类型。

 模块reg_slave
  #(参数
     类型T = INT,
     ŧREG_DEFVAL ='0 //参数DECL,大小= 1
   )();
 endmodule:reg_slave模块顶部();
  localparam reg_pkg :: defval_pair [1:0] REG_DEFVAL ='{
     {3,H32},
     {0,H1}
     }; //相同类型和尺寸= 2的参数  reg_slave#(
               .T(reg_pkg :: defval_pair [1:0]),
               .REG_DEFVAL(REG_DEFVAL)//试图覆盖的大小。
             )
  reg_slave_inst();endmodule:顶部

i have a module parameter that is an array of a predefined struct. I set the default size of this array as 1 element. The idea is to override it with the appropriate size at the time of instantiation.

The way i show below doesn't override the size. It only overides the first value. I can see why it would do this as the size field is not parameterized. Is there a better way than to pass a parameter for the size?

Thank you for the help.

    module reg_slave
      #(parameter
         reg_pkg::defval_pair [0:0] REG_DEFVAL  = '0 //param decl with size=1
       )();
     endmodule : reg_slave

    module top();
      localparam reg_pkg::defval_pair [1:0] REG_DEFVAL = '{
         {3,'h32},
         {0,'h1}
         };  //param of same type and size = 2

      reg_slave #(
                   .REG_DEFVAL(REG_DEFVAL) //trying to override the size.
                 )
      reg_slave_inst ();

    endmodule : top

    package reg_pkg;
      typedef struct packed { int ADDR; bit [31:0] VAL;} defval_pair;
    endpackage : reg_pkg
解决方案

Using type parameter. However, you still need an extra parameter to pass into the instance. The advantage is that you can change a parameter's type.

module reg_slave
  #(parameter
     type T = int,
     T REG_DEFVAL  = '0 //param decl with size=1
   )();
 endmodule : reg_slave

module top();
  localparam reg_pkg::defval_pair [1:0] REG_DEFVAL = '{
     {3,'h32},
     {0,'h1}
     };  //param of same type and size = 2

  reg_slave #(
               .T(reg_pkg::defval_pair[1:0]),
               .REG_DEFVAL(REG_DEFVAL) //trying to override the size.
             )
  reg_slave_inst ();

endmodule : top

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08-22 18:48