系统 verilog 正则表达式

本文介绍了系统 verilog 正则表达式的处理方法，对大家解决问题具有一定的参考价值，需要的朋友们下面随着小编来一起学习吧！

我知道系统 verilog 没有很好的内置正则表达式支持.

I understood that System verilog does not have very good regular expression support inbuilt.

如何在 systemVerilog 中检查 srting 是否与以下正则表达式匹配:"\d+(ns|ps|us)"

How can I check in systemVerilog that a srting matches to the following regular expressions: "\d+(ns|ps|us)"

您有许多不同的选择.

一些模拟器已经支持一组 SystemVerilog 字符串方法扩展，用于处理 str.match() 和 str.search() 等正则表达式.

Some simulators already support a set of SystemVerilog string method extensions that handle regular expressions such as str.match() and str.search().

result = str.match("pattern"); // returns true if the pattern is matched with the str.

如果您使用的是 UVM，有一个 DPI 例程可以做同样的事情

If you are using the UVM, there is a DPI routine that does the same thing

result = uvm_pkg::uvm_re_match("pattern",str);

还有许多其他软件包，例如 SVunit，它们也为您提供 DPI 例程.

There are number of other packages out there such as SVunit that also provide the DPI routines for you.

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