与多个可执行文件一个Makefile

与多个可执行文件一个Makefile

本文介绍了与多个可执行文件一个Makefile的处理方法,对大家解决问题具有一定的参考价值,需要的朋友们下面随着小编来一起学习吧!

问题描述

我试图写它采用宏一次创建多个文件,多个可执行文件生成文件。我试图寻找通过previously回答问题,但是,因为我是相当新的C编程以及用gcc的工作,我无法找到一个回答我的问题。

I am trying to write a makefile which uses macros to create multiple executables from multiple files at once. I tried searching through previously answered questions but, because I am fairly new to programming in C as well as working with gcc, I was not able to find an answer to my question.

下面是我到目前为止有:

Here is what I have so far:

CC=gcc
CFLAGS=-I.
OBJ = ex1.c ex3.c
EXECUTABLE = ex1 ex3

$(EXECUTABLE): $(OBJ)
    gcc -o $@ $^ $(CFLAGS)

clean:
    rm -f $(EXECUTABLE)

我想行

$(EXECUTABLE): $(OBJ)

分别创建文件ex1.c中ex3.c可执行EX1和EX3。

to create executables ex1 and ex3 from files ex1.c ex3.c respectively.

推荐答案

对于这种特殊情况下,如果每个可执行与 .C 扩展一个源文件,你需要的是一个行的Makefile:

For this particular case, where each executable has a single source file with .c extension, all you need is a one line Makefile:

all: ex1 ex3

对于内置的默认规则制作则已经工作:

$ make
cc -O2 -pipe   ex1.c  -o ex1
cc -O2 -pipe   ex3.c  -o ex3

幕后,制作使用

.c:
    $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $<

因人而异命令自己的喜好与让CC = GCC CFLAGS = -O2 LDFLAGS = -s 和类似。

当日花絮:其实,如果你愿意在调用时命名目标制作您可以使用空,甚至的运行没有的任何的Makefile:

Trivia of the day: in fact, if you are willing to name the targets when invoking make, you can use an empty or even run without any Makefile:

$ make -f /dev/null CC=gcc CFLAGS=-O2 LDFLAGS=-s ex1 ex3
gcc -O2 -s ex1.c  -o ex1
gcc -O2 -s ex3.c  -o ex3
$ rm -f Makefile ex1 ex3
$ make CC=gcc CFLAGS=-O2 LDFLAGS=-s ex1 ex3
gcc -O2 -s ex1.c  -o ex1
gcc -O2 -s ex3.c  -o ex3

使魔!

作为一个经验法则,不要重新发明轮子(或规则),使用已经存在的规则。它简化了您,让生活了很多。这使得小性感makefile文件IM preSS与女装: - )

As a rule of thumb, don't reinvent the wheel (or rules), use the rules that are already there. It simplifies your and make's life a lot. This makes for small and sexy makefiles to impress the ladies with :-)

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08-19 22:45