如何将目标文件放在单独的子目录中

问题描述

我在尝试使用make将目标文件放在单独的子目录中时遇到麻烦，这可能是一种非常基本的技术.我试图使用此页面中的信息: http://www.gnu.org/software /hello/manual/make/Prerequisite-Types.html#Prerequisite-Types

I'm having trouble with trying to use make to place object files in a separate subdirectory, probably a very basic technique. I have tried to use the information in this page:http://www.gnu.org/software/hello/manual/make/Prerequisite-Types.html#Prerequisite-Types

我从make得到以下输出:

I get the following output from make:

make: *** No rule to make target `ku.h', needed by `obj/kumain.o'.  Stop.

但是ku.h不是目标而是依赖关系(尽管它显然已包含在c源文件中).当我不尝试使用子目录来存储目标文件时(即错过了OBJDIR部分)，它可以正常工作.为什么让ku.h成为目标?

However ku.h is a dependency not a target (although it's obviously #included within the c source files). When I don't try to use a subdirectory for object files (i.e. miss out the OBJDIR parts) it works fine. Why does make think ku.h is a target?

我的makefile是这样的:(样式是在阅读了各种信息源之后的)

my makefile is this: (the style is after reading various sources of information)

.SUFFIXES:
.SUFFIXES: .c .o

CC=gcc
CPPFLAGS=-Wall
LDLIBS=-lhpdf
VPATH=%.c src
VPATH=%.h src
VPATH=%.o obj
OBJDIR=obj

objects= $(addprefix $(OBJDIR)/, kumain.o kudlx.o kusolvesk.o kugetpuz.o kuutils.o \
  kurand.o kuASCboard.o kuPDFs.o kupuzstrings.o kugensud.o \
  kushapes.o )

ku : $(objects)
  $(CC) $(CPPFLAGS) -o ku $(objects) $(LDLIBS)

$(objects) : ku.h kudefines.h kuglobals.h kufns.h | $(OBJDIR)

$(OBJDIR):
  mkdir $(OBJDIR)

.PHONY: clean
clean :
  rm $(objects)

我应用了更改以使用vpath指令.我的版本是VPATH = xxx和vpath％.c xxx的不良混合.但是我现在遇到另一个问题(这是我添加错误的vpath之前的原始问题).现在是输出:

I applied the change to use the vpath directive. My version was a bad mixture of VPATH=xxx and vpath %.c xxx. However I now get another problem (which was the original problem before I added the wrong vpath). This is now the output:

    gcc  -o ku -lhpdf obj/kumain.o obj/kudlx.o obj/kusolvesk.o ..etc
    gcc: obj/kumain.o: No such file or directory
    gcc: obj/kudlx.o: No such file or directory
    gcc: obj/kusolvesk.o: No such file or directory
    gcc: obj/kugetpuz.o: No such file or directory
    gcc: obj/kuutils.o: No such file or directory
    gcc: obj/kurand.o: No such file or directory
    gcc: obj/kuASCboard.o: No such file or directory
    gcc: obj/kuPDFs.o: No such file or directory
    gcc: obj/kupuzstrings.o: No such file or directory
    gcc: obj/kugensud.o: No such file or directory
    gcc: obj/kushapes.o: No such file or directory
    make: *** [ku] Error 1

尽管手册说，make似乎没有对目标文件应用隐式规则隐式规则告诉make如何使用惯用技术，这样您就不必在要使用它们时详细指定它们.例如，对于C编译有一个隐式规则.文件名确定将运行哪些隐式规则.对于例如，C编译通常会使用一个.c文件并创建一个.o文件.因此，当make看到文件名结尾的这种组合时，make将隐式规则应用于C编译."并且在考虑隐式规则的过程中也会发生在VPATH或vpath中指定目录的搜索(请参阅使用隐式规则)."

It appears that make is not applying the implicit rule for an object file although the manual says"Implicit rules tell make how to use customary techniques so that you do not have to specify them in detail when you want to use them. For example, there is an implicit rule for C compilation. File names determine which implicit rules are run. For example, C compilation typically takes a .c file and makes a .o file. So make applies the implicit rule for C compilation when it sees this combination of file name endings." and also "The search through the directories specified in VPATH or with vpath also happens during consideration of implicit rules (see Using Implicit Rules)."

再次在例如，当文件foo.o没有显式规则时，make将考虑隐式规则，例如如果该文件存在则编译foo.c的内置规则.当前目录中，将搜索适当的目录.如果在任何目录中存在foo.c(或在makefile中提到)，则将应用C隐式规则."

Again here "For example, when a file foo.o has no explicit rule, make considers implicit rules, such as the built-in rule to compile foo.c if that file exists. If such a file is lacking in the current directory, the appropriate directories are searched for it. If foo.c exists (or is mentioned in the makefile) in any of the directories, the implicit rule for C compilation is applied."

在使隐式规则适用于我的Makefile方面的任何协助将不胜感激.

Any assistance in getting implicit rules to work for my makefile would be greatly appreciated.

编辑编号2:感谢Jack Kelly，我制定了一个明确的规则来编译.c文件，因为我无法尝试使用隐式规则.另外还要感谢al_miro的vpath信息.

Edit no 2:Thanks to Jack Kelly I have made an explicit rule to compile the .c files since I couldn't get anywhere trying to use implicit rules. Also thanks to al_miro for the vpath info.

这是有效的makfile:

Here is the working makfile:

.SUFFIXES:
.SUFFIXES: .c .o

CC=gcc
CPPFLAGS=-Wall
LDLIBS=-lhpdf
OBJDIR=obj
vpath %.c src
vpath %.h src

objects = $(addprefix $(OBJDIR)/, kumain.o kudlx.o kusolvesk.o kugetpuz.o kuutils.o \
  kurand.o kuASCboard.o kuPDFs.o kupuzstrings.o kugensud.o \
  kushapes.o )

ku : $(objects)
  $(CC) $(CPPFLAGS) -o ku $(objects) $(LDLIBS)

$(OBJDIR) obj/%.o : %.c ku.h kudefines.h kuglobals.h kufns.h
  $(CC) -c $(CPPFLAGS) $< -o $@

.PHONY : clean
clean :
  rm $(objects)

推荐答案

由于您使用的是GNUmake，因此请使用模式规则来编译目标文件:

Since you're using GNUmake, use a pattern rule for compiling object files:

$(OBJDIR)/%.o: %.c
    $(CC) $(CFLAGS) $(CPPFLAGS) -c -o $@ $<

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