问题描述
有时,当使用-march=atom
进行编译时,GCC会生成此指令.每个Intel Atom CPU是否都支持MOVBE?
Sometimes GCC generates this instruction when compiling with -march=atom
. Does each and every Intel Atom CPU support MOVBE?
还有哪些其他处理器支持该指令?我似乎无法在英特尔网站上找到此信息.请帮忙.
What other processors support this instruction? I can't seem to find this information on Intel website. Please help.
推荐答案
该指令最初是英特尔®凌动™处理器所独有的.
This instruction was originally unique to the Intel® Atom™ processor.
从Intel方面:
在其他微体系结构中( http://instlatx64.atw.hu/,其中包含 https://agner.org/optimize/):
In other microarchitectures (http://instlatx64.atw.hu/ with uop info from https://agner.org/optimize/):
- 主流Intel:Haswell和更高版本.包括Haswell Xeon(Ex-xxxx v3).
解码为2或3微码,与bswap
+加载或存储相同. - 主流AMD:挖掘机和Ryzen家族. Steamroller和更早版本没有它.
有效地解码为单个uop.
- Mainstream Intel: Haswell and later. Including Haswell Xeon (Ex-xxxx v3).
Decodes as 2 or 3 uops, about the same asbswap
+ load or store. - Mainstream AMD: Excavator, and Ryzen-family. Steamroller and earlier don't have it.
Decodes efficiently to a single uop.
非主流CPU:
- 旧版Intel Atom:全部
- 英特尔Silvermont系列故障Atom:全部.有效地解码为单个uop.
-
AMD Jaguar.有效地解码为单个uop.
- Legacy in-order Intel Atom: all
- Intel Silvermont-family out-of-order Atom: all. Decodes efficiently to a single uop.
AMD Jaguar. Decodes efficiently to a single uop.
Intel Xeon Phi:Knight's Landing(基于Silvermont)及更高版本. (也许不在骑士的角落.)
Intel Xeon Phi: Knight's Landing (based on Silvermont) and later. (Maybe not on Knight's corner.)
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