本文介绍了如何在vhdl中使用float的处理方法，对大家解决问题具有一定的参考价值，需要的朋友们下面随着小编来一起学习吧！
问题描述
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.std_logic_signed.all;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity lms2 is
Port (wr9,wi9,xr,xi,u : in STD_LOGIC_VECTOR (12 downto 0);
--u : in integer;
yr,yi,er,ei,wr8,wi8,zzz,sum1 : out STD_LOGIC_VECTOR (12 downto 0));
end lms2;
architecture Behavioral of lms2 is
--variable r,s : real range 0.0 to 15.0;
begin
process(wr9,wi9,u,xr,xi)--process also runs without the parameters,but it gives problems during simulation
--process(u,xr,xi)
variable wr : std_logic_vector(12 downto 0);
variable wi : std_logic_vector(12 downto 0);
--variable wr : std_logic_vector(4 downto 0) :="00010";
--variable wi : std_logic_vector(4 downto 0) :="00011";
--variable wr : std_logic_vector(4 downto 0) :=wr9;
--variable wi : std_logic_vector(4 downto 0) :=wi9;
variable yr1 : integer;
variable yi1 : integer;
variable er1 : integer;
variable ei1 : integer;
variable wr1 : integer;
variable wi1 : integer;
variable uu : integer;
variable zz : integer;
variable sum : integer:= 0;
begin
--process(xr,xi,u)
--bi <= to_integer(unsigned(k)) ;
--bj <= to_integer(unsigned(l)) ;
--bk <= bi*bj;
uu := to_integer(unsigned(u)) ;
wr := wr9;
wi := wi9;
for z in 0 to 1 loop
yr1 := to_integer(unsigned(wr))*to_integer(unsigned(xr))- to_integer(unsigned(wi))*to_integer(unsigned(xi));
yi1 := to_integer(unsigned(wr))*to_integer(unsigned(xi))+to_integer(unsigned(wi))*to_integer(unsigned(xr));
er1 := to_integer(unsigned(wr))*to_integer(unsigned(xr))-to_integer(unsigned(wi))*to_integer(unsigned(xi))-to_integer(unsigned(xr));
ei1 := to_integer(unsigned(wr))*to_integer(unsigned(xi))+to_integer(unsigned(wi))*to_integer(unsigned(xr))-to_integer(unsigned(xi));
wr1 :=uu*(to_integer(unsigned(xr))*to_integer(unsigned(wr))*to_integer(unsigned(xr))-to_integer(unsigned(xr))*to_integer(unsigned(wi))*to_integer(unsigned(xi))-to_integer(unsigned(xr))*to_integer(unsigned(xr))-to_integer(unsigned(xi))*to_integer(unsigned(wr))*to_integer(unsigned(xi))-to_integer(unsigned(xi))*to_integer(unsigned(wi))*to_integer(unsigned(xr))+to_integer(unsigned(xi))*to_integer(unsigned(xi))+to_integer(unsigned(wr)));
wi1 :=uu*(to_integer(unsigned(xr))*to_integer(unsigned(wr))*to_integer(unsigned(xi))+to_integer(unsigned(xr))*to_integer(unsigned(wi))*to_integer(unsigned(xr))-to_integer(unsigned(xr))*to_integer(unsigned(xi))+to_integer(unsigned(xi))*to_integer(unsigned(wr))*to_integer(unsigned(xr))-to_integer(unsigned(xi))*to_integer(unsigned(wi))*to_integer(unsigned(xi))-to_integer(unsigned(xi))*to_integer(unsigned(xr))+to_integer(unsigned(wi)));
--o <= std_logic_vector(to_unsigned(i,5));
wr := std_logic_vector(to_unsigned(wr1,13));
wi := std_logic_vector(to_unsigned(wi1,13));
zz :=z;
sum := sum+2;
yr <= std_logic_vector(to_unsigned(yr1,13));
yi <= std_logic_vector(to_unsigned(yi1,13));
er <= std_logic_vector(to_unsigned(er1,13));
ei <= std_logic_vector(to_unsigned(ei1,13));
wr8 <= wr;
wi8 <= wi;
zzz <= std_logic_vector(to_unsigned(zz,13));
sum1 <= std_logic_vector(to_unsigned(sum,13));
end loop;
end process;
end Behavioral;
我们使用整数进行了计算。但是我们需要使用float来进行计算。即所有整数都将变为浮点数。请告诉我们如何在vhdl中使用浮点数
我尝试过：
我们使用整数完成了计算。现在我们需要使用float代替整数。
We have done the calculations using integer. However we need to use float for the calculations. ie all integers will be changed to float. Please tell us how to play with floating point numbers in vhdl
What I have tried:
We have done the calcultations using integer . Now we need to use float in place of the integers.
推荐答案
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