问题描述
为什么ARM只有16个寄存器？那是理想的数字吗？
Why does ARM have only 16 registers? Is that the ideal number?
具有更多寄存器的寄存器距离是否还会增加处理时间/功率？
Does distance of registers with more registers also increase the processing time/power ?
推荐答案
随着通用寄存器数量的减少，您需要开始使用堆栈来存储变量。使用堆栈需要更多指令，因此代码大小会增加。使用堆栈还会增加内存访问次数，这会损害性能和功耗。权衡是要代表更多的寄存器，您的指令中需要更多的位，并且您在芯片上需要更多的空间用于寄存器文件，这会增加功耗要求。通过用不同数量的寄存器编译同一组代码，您可以看到不同的寄存器数量如何影响代码大小和加载/存储指令的频率。这种练习的结果可以在本文的表1中看到：
As the number of the general-purpose registers becomes smaller, you need to start using the stack for variables. Using the stack requires more instructions, so code size increases. Using the stack also increases the number of memory accesses, which hurts both performance and power usage. The trade off is that to represent more registers you need more bits in your instruction, and you need more room on the chip for the register file, which increases power requirements. You can see how differing register counts affects code size and the frequency of load/store instructions by compiling the same set of code with different numbers of registers. The result of that type of exercise can be seen in table 1 of this paper:
Extendable Instruction Set Computing
Register Program Load/Store
Count Size Frequency
27 100.00 27.90%
16 101.62 30.22%
8 114.76 44.45%
（他们使用27作为基数，因为这是MIPS处理器上可用的GPR的数量）
(They used 27 as a base because that is the number of GPRs available on a MIPS processor)
如您所见，当您将寄存器数减少到16时，程序大小和所需的加载/存储数量都只有少量改善。到8个寄存器。我怀疑当您寻求每瓦最佳性能时，ARM设计师认为16个寄存器是一个最佳选择。
As you can see, there are only marginal improvements in both programs size and the number of load/stores required as you drop the register count down to 16. The real penalties don't kick in until you drop down to 8 registers. I suspect ARM designers felt that 16 registers was a kind of sweet spot when you were looking for the best performance per watt.
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