是否可以在M0 +上的运行时设置ISR处理程序

问题描述

我的SAMD21 ARM M0 +有一个默认" resetVectors.c文件.它的外观如下:

I have a "default" resetVectors.c file for my SAMD21 ARM M0+. It has something that looks like:

__attribute__ ((section(".vectors")))
const DeviceVectors exception_table = {
    ...
};

其中定义了不同处理程序存根的位置.出于测试目的，我要使用未使用的外围IRQ之一.

in it that defines where different handler stubs. For testing purposes, I want to use one of the unused peripheral IRQs.

默认情况下，未使用的地址设置为NULL地址.我向自己证明了可以修改该文件，并在编译时更改未使用的IRQ(21)以触发处理程序.但是，有可能在编译时间之外进行此操作吗?

By default, the unused ones are set to NULL addresses. I have demonstrated to myself that I can modify that file and at compile time change my unused IRQ (21) to fire a handler. BUT, is it possible to do this outside of compile time?

我观察到该表似乎基于偏移量0.所以我尝试了此操作:

I observed that the table appears to be based at offset 0. So I tried this:

DeviceVectors *table = 0x0000000;
table->pvReserved21 = PV21Handler;

但这只是挂板.是否有一种动态方式在运行时分配处理程序?

But that just hangs the board. Is there a dynamic way to assign the handler at runtime?

推荐答案

在Cortex-M中，可以在运行时设置向量表的地址.因此，为了设置特定的向量，您需要将向量表定位到RAM中.

In Cortex-M it is possible to set the address of the vector table at runtime. So in order to set a specific vector, you need to locate the vector table into RAM.

在这种情况下，最简单的方法是将exception_table指向的向量表复制到RAM，修改需要在RAM副本中更改的特定向量，然后将向量表切换到RAM副本.

The simplest method in this case is to copy the vector table pointed to by exception_table to RAM, modify the specific vector you need to change in the RAM copy, then switch the vector table to the RAM copy.

但是请注意， 向量表偏移寄存器 在Cortex-M0 +上是可选的，可能并非在所有设备上都实现.但是，它是在SAMD21上实现的(请参见数据表摘要.

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