问题描述
我正在尝试用一些相同的模块来形容一个顶级的verilog。第一次连接应该在外面连接,而其他的演变应该是浮动的。任何人都可以帮助我使用AUTO与AUTO_TEMPLATE使emacs将所有输入连接到零,并将所有输出留空[]。
我在模块IO名称中没有任何标识,表示其输入或输出(因此我不能使用通配符)
有没有办法可以识别所有输入(并连接到零)和所有输出(并留下浮动)?
谢谢
我已经设法通过使用带有lisp的auto_template来实例化这些模块:
/ *
module_name AUTO_TEMPLATE
(
。(。*)(@(if(equal vl-dir \output\ )\\(concat vl-width \'b0\))),
);
* /
这样 - 所有输入都是0,输出不连接!!
I am trying to write a top verilog with instansiations of a few identical modules. the first instansiation should be connected outside, while the other instansiations should be floating.Can anyone help me use the AUTO's with AUTO_TEMPLATE to have emacs connect all inputs to zero, and leave all outputs empty [].I don't have any identification in the module IO name indicating if its input or output (so I can't use wildcards)Is there a way that the tool can identify all inputs (and connect to zero) and all outputs (and leave floating) by itself?Thanks
I'v managed to have such modules instantiated by using the auto_template with lisp:
/* module_name AUTO_TEMPLATE ( .(.*) (@"(if (equal vl-dir \"output\") \"\" (concat vl-width \"'b0\"))"), );
*/that way - all inputs are 0, and outputs are left unconnected!!
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