clk'event 与rising_edge()

问题描述

我一直用它来检测上升沿:

I had always used this for detecting a rising edge:

if (clk'event and clk='1') then

但这也可以使用:

ifrising_edge(clk) then

阅读这篇文章，rising_edge(clk) 是推荐的，但也有 注释表明rising_edge(clk)可能导致错误行为.

Reading this post, rising_edge(clk) is recommended, but there is also a comment indicating that rising_edge(clk) could lead to wrong behaviour.

我无法决定为未来选择哪一个，继续使用 (clk'event and clk='1') 还是采用 rising_edge(clk).

I can't decide which one to choose for the future, going on with (clk'event and clk='1') or adopting rising_edge(clk).

对这两个有任何实际经验吗?有什么偏好吗?

Any real-world expereince on these two? Any preferences?

谢谢！

推荐答案

rising_edge 定义为:

rising_edge is defined as:

FUNCTION rising_edge  (SIGNAL s : std_ulogic) RETURN BOOLEAN IS
BEGIN
    RETURN (s'EVENT AND (To_X01(s) = '1') AND
                        (To_X01(s'LAST_VALUE) = '0'));
END;

FUNCTION To_X01  ( s : std_ulogic ) RETURN  X01 IS
BEGIN
    RETURN (cvt_to_x01(s));
END;

CONSTANT cvt_to_x01 : logic_x01_table := (
                     'X',  -- 'U'
                     'X',  -- 'X'
                     '0',  -- '0'
                     '1',  -- '1'
                     'X',  -- 'Z'
                     'X',  -- 'W'
                     '0',  -- 'L'
                     '1',  -- 'H'
                     'X'   -- '-'
                    );

如果您的时钟仅从 0 到 1，从 1 到 0，则rising_edge 将生成相同的代码.否则，您可以解释差异.

If your clock only goes from 0 to 1, and from 1 to 0, then rising_edge will produce identical code. Otherwise, you can interpret the difference.

就我个人而言，我的时钟只能从 0 到 1，反之亦然.我发现 rising_edge(clk) 比 (clk'event and clk = '1') 变体更具描述性.

Personally, my clocks only go from 0 to 1 and vice versa. I find rising_edge(clk) to be more descriptive than the (clk'event and clk = '1') variant.

这篇关于clk'event 与rising_edge()的文章就介绍到这了，希望我们推荐的答案对大家有所帮助，也希望大家多多支持！