问题描述
我试图找出x86 16位寻址模式(MASM组件)中不存在比例因子的原因。而32位和64位寻址模式具有比例因子。这是背后的实际原因还是不需要?
I'm trying to figure out a reason for the scale factor not being present in the x86 16-bit addressing modes (MASM assembly). While the 32-bit and 64-bit addressing modes have a scale factor. Is there an actual reasoning behind this or it doesn't need it? I would appreciate it if you could explain.
将不同组件组合起来以创建有效地址的所有可能方式:
All possible ways different components can be combined to create an effective address:
16位和32位寻址之间的差异模式
Differences between 16- and 32-bit addressing modes
推荐答案
16位寻址模式仅允许单个ModRM字节对寄存器(3位),模式(2位)和寄存器/内存操作数(3位)进行编码),因此就没有空间对比例因子进行编码,甚至没有空间让任意寄存器成为基数或索引。 将它们全部列出,这不是一长串!只是(BP | BX)+(DI | SI)+ disp0 / 8/16
的子集。请记住,在类似 add cx,[bx + si]
的指令中,寄存器目标需要3位 / r
16-bit addressing modes only allow a single ModRM byte to encode the register (3 bits), mode (2 bits) and the register/memory operand (3 bits), so there's no room to encode a scale factor, or even to let arbitrary registers be bases or indices. NASM x86 16-bit addressing modes lists them all, it's not a long list! Just subsets of (BP|BX) + (DI|SI) + disp0/8/16
. Remember that in an instruction like add cx, [bx+si]
, the register destination needs the 3 bit /r
field in ModRM to encode which of the 8 GP registers.
(2位模式表示它是寄存器还是存储器,例如添加bx,cx
与添加[bx],cx
,以及有多少立即移位字节:disp8 / disp16或无移位。)
(The 2-bit "mode" signals whether it's a register or memory, e.g. add bx, cx
vs. add [bx], cx
, and how many immediate displacement bytes there are: disp8 / disp16 or no displacement.)
在32/64位寻址模式下,ModRM中的r / m字段可以是转义码,表示存在SIB字节(Scale /索引/基数),这为编码具有2个移位计数的缩放索引寻址模式提供了空间。
In 32/64-bit addressing modes, the r/m field in ModRM can be an escape code that signals the presence of a SIB byte (Scale/Index/Base), which gives room to encode scaled-index addressing modes with a 2-bit shift count.
还有足够的编码空间可以让我们使用任何寄存器作为基数,并使用任何寄存器(ESP除外)作为索引。因此32位寻址模式使寄存器更加正交。有关转义序列的详细信息,请参见,例如 [esp]
始终需要一个SIB字节,因为这意味着base = ESP的编码是存在SIB字节的转义代码。
And also enough coding space to let us use any register as a base, and any register (except ESP) as an index. So 32-bit addressing modes make the registers more orthogonal. See rbp not allowed as SIB base? for the details on the escape sequences, e.g. [esp]
always needs a SIB byte because the encoding that would mean base=ESP is the escape code for the presence of a SIB byte.
请参见或英特尔手册中的ModRM / SIB表以获取更多详细信息。
See https://wiki.osdev.org/X86-64_Instruction_Encoding#32.2F64-bit_addressing_2 or the ModRM/SIB tables in Intel's manuals for more details.
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