编写CPU缓存?

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问题描述

大家好:


我已阅读优化C代码的参考资料,以利用

<插入您最喜欢的CPU>的CPU缓存。


任何人都可以向我指出一些关于'net

的信息,这些信息可以在C中获得这种技术的技术
(或者C ++)在某种程度上?


我想这可以特定于有问题的CPU。

我不是非常担心有权访问具体

CPU。我对一般的技术更感兴趣,比说,优化我的笔记本电脑的Duron ... ...


先谢谢!


Eric

Hello all:

I have read references to optimizing C code to exploit
the CPU cache of <insert your favourite CPU>.

Can anyone point me towards some info on the ''net
that gets into techniques for this kind of thing in C
(or C++) in some depth?

I imagine this can get specific to the CPU in question.
I''m not terribly worried about having access to specific
CPUs. I am more interested in the techniques in general,
than, say, in optimizing for my notebook''s Duron...

Thanks in Advance!

Eric

推荐答案




自动调谐线性代数软件(ATLAS)





Automatically Tuned Linear Algebra Software (ATLAS)

http://www.netlib.org/atlas/





C语言标准定义了一个既没有
CPU也没有缓存的抽象机器。所有这些概念都是完全编译器和特定于硬件的硬件,因此完全偏离该组。它只是不是语言问题。


-

Jack Klein

主页:

常见问题

comp.lang.c

comp.lang.c ++

alt.comp .lang.learn.c-c ++



The C language standard defines an abstract machine that has neither a
CPU nor a cache. All such concepts are completely compiler and
hardware specific, and hence completely off-topic in this group. It
is simply not a language issue.

--
Jack Klein
Home: http://JK-Technology.Com
FAQs for
comp.lang.c http://www.eskimo.com/~scs/C-faq/top.html
comp.lang.c++ http://www.parashift.com/c++-faq-lite/
alt.comp.lang.learn.c-c++ ftp://snurse-l.org/pub/acllc-c++/faq





CPU可能有多个Cache:指令缓存

和数据缓存。在任何一种情况下,这里是你如何编码

来优化缓存。

最大的CPU周期浪费(在一个拥有的CPU中)

a cache)是重新加载缓存。你想

减少或减少它。对于指令缓存,这个
将涉及在循环中展开代码并减少

if将语句转换为条件逻辑,也许是b $ b甚至是布尔算术。对于数据缓存,请按顺序保持

数据访问。二进制搜索会对缓存造成严重破坏(取决于其大小和搜索大小的b
)。另外,减少内存变量的数量和不能在寄存器,累加器或你的b
处理器数据处理中包含的对象
acesses的数量设备。


与往常一样,在优化任何

代码之前使用分析器。在代码之前优化设计。

在优化

设计之前优化需求。


-

Thomas Matthews


C ++新闻组欢迎辞:


C ++常见问题:

C常见问题:

alt.comp.lang.learn.c-c ++ faq:


其他网站:
http://www.josuttis.com - C ++ STL图书馆书



A CPU may have more than one Cache: instruction cache
and data cache. In either case, here is how you code
to optimize a cache.

The biggest wast of CPU cycles (in a CPU that has
a cache) is the reloading of the cache. You want to
reduce or minimize it. For an instruction cache, this
would involve unrolling code in loops and reducing
"if" statements into conditional logic, perhaps
even boolean arithmetic. For data cache, keep your
data accesses sequential. A binary search would
play havoc on a cache (depending on its size and
the search size). Also, reduce the number of
acesses to memory variable and objects that cannot
be containined in a register, accumulator or your
processors data handling device.

As always, use a profiler before optimizing any
code. Optimize the design before the code.
Optimize the requirements before optimizing the
design.

--
Thomas Matthews

C++ newsgroup welcome message:
http://www.slack.net/~shiva/welcome.txt
C++ Faq: http://www.parashift.com/c++-faq-lite
C Faq: http://www.eskimo.com/~scs/c-faq/top.html
alt.comp.lang.learn.c-c++ faq:
http://www.raos.demon.uk/acllc-c++/faq.html
Other sites:
http://www.josuttis.com -- C++ STL Library book


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08-27 08:43
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