我一直在从事一个使用来自许多作者（物理学）的不同来源和代码的项目，我想将它们合并在一起并在它们之间进行交流。
问题在于，其中某些源和makefile首先调用链接的库，然后调用c文件：
$(CC) $(lflags) -o smith2demo smith2demo.o smith2.o
到目前为止，在我所的计算机和某些其他系统上，一切都工作正常。那里我有这个gcc编译器：
$gcc --version
gcc (Debian 4.9.2-10) 4.9.2
Copyright (C) 2014 Free Software Foundation, Inc.
因此，直到尝试在Ubuntu上运行代码之前，我才注意到此问题：
gcc (Ubuntu 4.9.3-5ubuntu1) 4.9.3
Copyright (C) 2015 Free Software Foundation, Inc.
在ubuntu中，我得到如下信息：
smith2.c:(.text+0x29b): undefined reference to `sincos'
我知道链接库规范及其原因，请在此处回答：
GCC C++ Linker errors: Undefined reference to 'vtable for XXX', Undefined reference to 'ClassName::ClassName()'
Why does the order in which libraries are linked sometimes cause errors in GCC?
Why am I getting a gcc "undefined reference" error trying to create shared objects?
因此，我有两个问题：
如果两个gcc都是最新版本，为什么在Debian系统中没有这个问题？
我如何做才能将此代码分发给其他人，而又不告诉他们在C文件之前更改调用库的所有makefile？
在项目中的大多数情况下，我都会使用整个Makefile，然后仅切换到源文件夹并在其中执行
$(MAKE)。有没有一种方法可以将
--no-as-needed设置为所有人的选项，或者是一种更明智的方式？我对makefile的经验很少。
最佳答案
在我的个人生活中，我使用自己的Makefile。这是它的简单版本。
MAIN = main
HEADER_DEFINITIONS = fibo
CC = g++-4.9 -std=c++11
COMPILE = -c
EXE = $(MAIN)
OPTIMIZE = -Os
SHELL = /bin/bash
ARGS = 20
all: link
@echo "Executing..........."
@echo " > > > > > > OUTPUT < < < < < < "
@$(SHELL) -c './$(EXE) $(ARGS)'
link: compile
@echo -n "Linking............."
@$(SHELL) -c '$(CC) -o $(EXE) *.o'
compile: $(MAIN).cpp $(HEADER_DEFINITIONS).cpp
@echo -n "Compiling........."
@$(SHELL) -c '$(CC) $(OPTIMIZE) $(COMPILE) $^'
clean:
@echo "Cleaning............"
@$(SHELL) -c 'rm -f *~ *.o $(EXE)'
如果要进一步修改并添加某些链接器标志，则完全有可能
编辑2我的个人Makefile
#
# A simple makefile for managing build of project composed of C source files.
#
# It is likely that default C compiler is already gcc, but explicitly
# set, just to be sure
CC = gcc
# The CFLAGS variable sets compile flags for gcc:
# -g compile with debug information
# -Wall give verbose compiler warnings
# -O0 do not optimize generated code
# -std=c99 use the C99 standard language definition
# -m32 CS107 targets architecture IA32 (32-bit)
CFLAGS = -g -Wall -O0 -std=c99 -m32
# The LDFLAGS variable sets flags for linker
# -lm says to link in libm (the math library)
LDFLAGS = -lm
# In this section, you list the files that are part of the project.
# If you add/change names of source files, here is where you
# edit the Makefile.
SOURCES = demo.c vector.c map.c
OBJECTS = $(SOURCES:.c=.o)
TARGET = demo
# The first target defined in the makefile is the one
# used when make is invoked with no argument. Given the definitions
# above, this Makefile file will build the one named TARGET and
# assume that it depends on all the named OBJECTS files.
$(TARGET) : $(OBJECTS)
$(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS)
.PHONY: clean
clean:
@rm -f $(TARGET) $(OBJECTS) core