OK335xS 系统启动配置解析 一、参考文档:
AM335x ARM® Cortex™-A8 Microprocessors (MPUs) Technical Reference Manual 二、SYSBOOT Configuration Pins Notes(page ):
. WAIT is monitored on GPMC_WAIT0.
. MUX1 and MUX2 designate which group of XIP signals are used. Each group is defined in Table -.
. Note that even though some bits may be a "don't care" for ROM code, all SYSBOOT values are latched into the CONTROL_STATUS register and may be used by software after ROM execution has completed.
. SYSBOOT[:] terminals are respectively LCD_DATA[:] inputs, latched on the rising edge of PWRONRSTn.
LCD_DATA[:]引脚电平在PWRONRSTn上升沿的时候被锁定进入SYSBOOT[:] 三、Current Configuration:
. SYSBOOT[:]: 0b0100
. 参考表格:Table -. SYSBOOT Configuration Pins[](page )
. 分析配置:
+--------+----------------+----------------+----------------+---------------+
| Bits | SYSBOOT[:] | SYSBOOT[:] | SYSBOOT[:] | SYSBOOT[] |
+--------+----------------+----------------+----------------+---------------+
| value | | | | |
+--------+----------------+----------------+----------------+---------------+
| mode | 01b = 24MHz | reserved |non-muxed device|ECC done by ROM|
+--------+----------------+----------------+----------------+---------------+
| Bits | SYSBOOT[] | SYSBOOT[:] | SYSBOOT[] | SYSBOOT[:] |
+--------+----------------+----------------+----------------+---------------+
| value | | | | |
+--------+----------------+----------------+----------------+ |
| mode | -bit device | Don't care |CLKOUT1 disabled| |
+--------+----------------+----------------+----------------+ |
| Bits | Boot Sequence | |
+--------+--------------------------------------------------+ |
| value | |
+--------+------------------------------------------------------------------+
| mode | .UART0 .XIP .MMC0 .NAND |
+--------+------------------------------------------------------------------+